ssdt合并到dsdt，cpu变频OK

sblook 发表于 2016-5-11 13:25

本帖最后由 sblook 于 2016-5-11 13:30 编辑

简约控，文件能精简则精简。
我的U是I7 6700T，先上图

6档变频，不知道6700T 这款低压U是否正确。

方法：
1. 通过ssdtPRGen.sh取得生成的ssdt文件，例如我的U得到的代码如下：
请不要复制我的代码，不一定适合你的U
/*
* Intel ACPI Component Architecture
* AML Disassembler version 20140210-00
* Copyright (c) 2000 - 2014 Intel Corporation
*
* Original Table Header:
* Signature    "SSDT"
* Length       0x0000036A (874)
* Revision       0x01
* Checksum       0x00
* OEM ID       "APPLE "
* OEM Table ID "CpuPm"
* OEM Revision 0x00018200 (98816)
* Compiler ID    "INTL"
* Compiler Version 0x20140210 (538182160)
*/

DefinitionBlock ("ssdt.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00018200)
{
External (\_PR_.CPU0, DeviceObj)
External (\_PR_.CPU1, DeviceObj)
External (\_PR_.CPU2, DeviceObj)
External (\_PR_.CPU3, DeviceObj)
External (\_PR_.CPU4, DeviceObj)
External (\_PR_.CPU5, DeviceObj)
External (\_PR_.CPU6, DeviceObj)
External (\_PR_.CPU7, DeviceObj)

Scope (\_PR_.CPU0)
{
   Method (_INI, 0, NotSerialized)
   {
         Store ("ssdtPRGen version....: 18.2 / Mac OS X 10.11.4 (15E65)", Debug)
         Store ("custom mode..........: 0", Debug)
         Store ("host processor.......: Intel(R) Core(TM) i7-6700T CPU @ 2.80GHz", Debug)
         Store ("target processor.....: i7-6700T", Debug)
         Store ("number of processors.: 1", Debug)
         Store ("baseFrequency........: 800", Debug)
         Store ("frequency............: 2800", Debug)
         Store ("busFrequency.........: 100", Debug)
         Store ("logicalCPUs..........: 8", Debug)
         Store ("maximum TDP..........: 35", Debug)
         Store ("packageLength........: 29", Debug)
         Store ("turboStates..........: 8", Debug)
         Store ("maxTurboFrequency....: 3600", Debug)
         Store ("machdep.xcpm.mode....: 1", Debug)
   }

   Name (APLF, Zero)
   Name (APSN, 0x08)
   Name (APSS, Package (0x1D)
   {
         /* High Frequency Modes (turbo) */
         Package (0x06) { 0x0E10, 0x0088B8, 0x0A, 0x0A, 0x2400, 0x2400 },
         Package (0x06) { 0x0DAC, 0x0088B8, 0x0A, 0x0A, 0x2300, 0x2300 },
         Package (0x06) { 0x0D48, 0x0088B8, 0x0A, 0x0A, 0x2200, 0x2200 },
         Package (0x06) { 0x0CE4, 0x0088B8, 0x0A, 0x0A, 0x2100, 0x2100 },
         Package (0x06) { 0x0C80, 0x0088B8, 0x0A, 0x0A, 0x2000, 0x2000 },
         Package (0x06) { 0x0C1C, 0x0088B8, 0x0A, 0x0A, 0x1F00, 0x1F00 },
         Package (0x06) { 0x0BB8, 0x0088B8, 0x0A, 0x0A, 0x1E00, 0x1E00 },
         Package (0x06) { 0x0B54, 0x0088B8, 0x0A, 0x0A, 0x1D00, 0x1D00 },
         /* High Frequency Modes (non-turbo) */
         Package (0x06) { 0x0AF0, 0x0088B8, 0x0A, 0x0A, 0x1C00, 0x1C00 },
         Package (0x06) { 0x0A8C, 0x008257, 0x0A, 0x0A, 0x1B00, 0x1B00 },
         Package (0x06) { 0x0A28, 0x007C15, 0x0A, 0x0A, 0x1A00, 0x1A00 },
         Package (0x06) { 0x09C4, 0x0075F1, 0x0A, 0x0A, 0x1900, 0x1900 },
         Package (0x06) { 0x0960, 0x006FEB, 0x0A, 0x0A, 0x1800, 0x1800 },
         Package (0x06) { 0x08FC, 0x006A03, 0x0A, 0x0A, 0x1700, 0x1700 },
         Package (0x06) { 0x0898, 0x006438, 0x0A, 0x0A, 0x1600, 0x1600 },
         Package (0x06) { 0x0834, 0x005E8B, 0x0A, 0x0A, 0x1500, 0x1500 },
         Package (0x06) { 0x07D0, 0x0058FA, 0x0A, 0x0A, 0x1400, 0x1400 },
         Package (0x06) { 0x076C, 0x005387, 0x0A, 0x0A, 0x1300, 0x1300 },
         Package (0x06) { 0x0708, 0x004E2F, 0x0A, 0x0A, 0x1200, 0x1200 },
         Package (0x06) { 0x06A4, 0x0048F4, 0x0A, 0x0A, 0x1100, 0x1100 },
         Package (0x06) { 0x0640, 0x0043D5, 0x0A, 0x0A, 0x1000, 0x1000 },
         Package (0x06) { 0x05DC, 0x003ED2, 0x0A, 0x0A, 0x0F00, 0x0F00 },
         Package (0x06) { 0x0578, 0x0039EA, 0x0A, 0x0A, 0x0E00, 0x0E00 },
         Package (0x06) { 0x0514, 0x00351E, 0x0A, 0x0A, 0x0D00, 0x0D00 },
         Package (0x06) { 0x04B0, 0x00306C, 0x0A, 0x0A, 0x0C00, 0x0C00 },
         Package (0x06) { 0x044C, 0x002BD6, 0x0A, 0x0A, 0x0B00, 0x0B00 },
         Package (0x06) { 0x03E8, 0x002759, 0x0A, 0x0A, 0x0A00, 0x0A00 },
         Package (0x06) { 0x0384, 0x0022F8, 0x0A, 0x0A, 0x0900, 0x0900 },
         /* Low Frequency Mode */
         Package (0x06) { 0x0320, 0x001EB0, 0x0A, 0x0A, 0x0800, 0x0800 }
   })

   Method (ACST, 0, NotSerialized)
   {
         Store ("Method _PR_.CPU0.ACST Called", Debug)
         Store ("CPU0 C-States : 253", Debug)

         /* Low Power Modes for CPU0 */
         Return (Package (0x06)
         {
            One,
            0x04,
            Package (0x04)
            {
               ResourceTemplate ()
               {
                     Register (FFixedHW,
                        0x01,             // Bit Width
                        0x02,             // Bit Offset
                        0x0000000000000000, // Address
                        0x01,             // Access Size
                        )
               },
               One,
               Zero,
               0x03E8
            },

            Package (0x04)
            {
               ResourceTemplate ()
               {
                     Register (FFixedHW,
                        0x01,             // Bit Width
                        0x02,             // Bit Offset
                        0x0000000000000010, // Address
                        0x03,             // Access Size
                        )
               },
               0x03,
               0xCD,
               0x01F4
            },

            Package (0x04)
            {
               ResourceTemplate ()
               {
                     Register (FFixedHW,
                        0x01,             // Bit Width
                        0x02,             // Bit Offset
                        0x0000000000000020, // Address
                        0x03,             // Access Size
                        )
               },
               0x06,
               0xF5,
               0x015E
            },

            Package (0x04)
            {
               ResourceTemplate ()
               {
                     Register (FFixedHW,
                        0x01,             // Bit Width
                        0x02,             // Bit Offset
                        0x0000000000000030, // Address
                        0x03,             // Access Size
                        )
               },
               0x07,
               0xF5,
               0xC8
            }
         })
   }

   Method (_DSM, 4, NotSerialized)
   {
         Store ("Method _PR_.CPU0._DSM Called", Debug)

         If (LEqual (Arg2, Zero))
         {
            Return (Buffer (One)
            {
               0x03
            })
         }

         Return (Package (0x02)
         {
            "plugin-type",
            One
         })
   }
}

Scope (\_PR_.CPU1)
{
   Method (APSS, 0, NotSerialized)
   {
         Store ("Method _PR_.CPU1.APSS Called", Debug)

         Return (\_PR_.CPU0.APSS)
   }

   Method (ACST, 0, NotSerialized)
   {
         Store ("Method _PR_.CPU1.ACST Called", Debug)
         Store ("CPU1 C-States : 31", Debug)

         /* Low Power Modes for CPU1 */
         Return (Package (0x07)
         {
            One,
            0x05,
            Package (0x04)
            {
               ResourceTemplate ()
               {
                     Register (FFixedHW,
                        0x01,             // Bit Width
                        0x02,             // Bit Offset
                        0x0000000000000000, // Address
                        0x01,             // Access Size
                        )
               },
               One,
               0x03E8,
               0x03E8
            },

            Package (0x04)
            {
               ResourceTemplate ()
               {
                     Register (FFixedHW,
                        0x01,             // Bit Width
                        0x02,             // Bit Offset
                        0x0000000000000010, // Address
                        0x03,             // Access Size
                        )
               },
               0x02,
               0x94,
               0x01F4
            },

            Package (0x04)
            {
               ResourceTemplate ()
               {
                     Register (FFixedHW,
                        0x01,             // Bit Width
                        0x02,             // Bit Offset
                        0x0000000000000030, // Address
                        0x03,             // Access Size
                        )
               },
               0x03,
               0xC6,
               0xC8
            },

            Package (0x04)
            {
               ResourceTemplate ()
               {
                     Register (FFixedHW,
                        0x01,             // Bit Width
                        0x02,             // Bit Offset
                        0x0000000000000040, // Address
                        0x03,             // Access Size
                        )
               },
               0x06,
               0xF5,
               0x015E
            },

            Package (0x04)
            {
               ResourceTemplate ()
               {
                     Register (FFixedHW,
                        0x01,             // Bit Width
                        0x02,             // Bit Offset
                        0x0000000000000050, // Address
                        0x03,             // Access Size
                        )
               },
               0x07,
               0xF5,
               0xC8
            }
         })
   }
}

Scope (\_PR_.CPU2)
{
   Method (APSS, 0, NotSerialized)
   {
         Store ("Method _PR_.CPU2.APSS Called", Debug)

         Return (\_PR_.CPU0.APSS)
   }

   Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}

Scope (\_PR_.CPU3)
{
   Method (APSS, 0, NotSerialized)
   {
         Store ("Method _PR_.CPU3.APSS Called", Debug)

         Return (\_PR_.CPU0.APSS)
   }

   Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}

Scope (\_PR_.CPU4)
{
   Method (APSS, 0, NotSerialized)
   {
         Store ("Method _PR_.CPU4.APSS Called", Debug)

         Return (\_PR_.CPU0.APSS)
   }

   Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}

Scope (\_PR_.CPU5)
{
   Method (APSS, 0, NotSerialized)
   {
         Store ("Method _PR_.CPU5.APSS Called", Debug)

         Return (\_PR_.CPU0.APSS)
   }

   Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}

Scope (\_PR_.CPU6)
{
   Method (APSS, 0, NotSerialized)
   {
         Store ("Method _PR_.CPU6.APSS Called", Debug)

         Return (\_PR_.CPU0.APSS)
   }

   Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}

Scope (\_PR_.CPU7)
{
   Method (APSS, 0, NotSerialized)
   {
         Store ("Method _PR_.CPU7.APSS Called", Debug)

         Return (\_PR_.CPU0.APSS)
   }

   Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
}
结合我的dsdt文件看

从右侧的树状图，可以看到我的dsdt的cpu定义部分和ssdt结构相当类似，所以基本上就是copy and paste就能完成的。

2. 动手合并

首先把
External (\_PR_.CPU0, DeviceObj)
External (\_PR_.CPU1, DeviceObj)
External (\_PR_.CPU2, DeviceObj)
External (\_PR_.CPU3, DeviceObj)
External (\_PR_.CPU4, DeviceObj)
External (\_PR_.CPU5, DeviceObj)
External (\_PR_.CPU6, DeviceObj)
External (\_PR_.CPU7, DeviceObj)合并到你的dsdt开头部分的声明中去，很多External都在一起，很容易找。

然后把CPU0-CPU7里面的代码对应替换到dsdt的相应位置。
如：把ssdt中的“Scope (\_PR_.CPU1)｛XXXXXXXXXX代码略去｝”把｛｝里面的内容替换到DSDT文件中的“Scope (_PR.CPU1)”，注意去掉"\_"是合并ssdt的细节，要去掉“\”

3. Clover配置修改
在clover的ACPI配置项下，不要勾选“generate Pstates”和“generate Cstates”。

4. 重启

5. 检验。把附件中的“MSRDumper.kext”放在桌面
然后调出terminal, 依次输入：

cd desktopsudo chown -R 0:0 MSRDumper.kextsudo kextload MSRDumper.kext正常的话就能在“控制台”看到U的频率变化了。

zhengyanchu 发表于 2016-5-11 13:36

楼主太厉害了，最近在学习黑苹果

liangjikang 发表于 2016-5-11 13:37

真的吗？好厉害啊！

liangjikang 发表于 2016-5-11 13:38

我是小白我不懂

liangjikang 发表于 2016-5-11 13:38

楼主能不能教教我

dumpling333333 发表于 2016-5-11 13:42

恩，一直很好奇怎么合并的！有指导作用

loppol 发表于 2016-5-11 13:43

不合并，变频不了？

bizongyi 发表于 2016-5-11 13:44

MSRDumper对使用xcpm变频的cpu支持得不好，得到的数值不一定都是你的真实档位。看变频档位，最靠谱的还是intel power gadget，可惜这软件n年不更新，不支持skylake。

sblook 发表于 2016-5-11 13:46

loppol 发表于 2016-5-11 13:43 https://www.pcbeta.com/static/image/common/back.gif
不合并，变频不了？

可以呀，我开头说了，简约控。一堆文件都扔到clover下也行，用脚本ssdtPRGen.sh生成单个ssdt后和dsdt放在一起也行，我是能用一个文件干的事尽量不用2个，另外我的dsdt下已经有一部分对cpu定义了，虽然不知道和ssdt分开放是否会有冲突，但还是觉得合并的好

loppol 发表于 2016-5-11 13:54

sblook 发表于 2016-5-11 13:46 https://www.pcbeta.com/static/image/common/back.gif
可以呀，我开头说了，简约控。一堆文件都扔到clover下也行，用脚本ssdtPRGen.sh生成单个ssdt后和dsdt放在 ...

6666，简约至上！

51029417 发表于 2016-5-11 14:00

这个对我等小白来说太高端！

awwinui 发表于 2016-5-11 14:00

6666，简约至上！

sblook 发表于 2016-5-11 14:01

bizongyi 发表于 2016-5-11 13:44 https://www.pcbeta.com/static/image/common/back.gif
MSRDumper对使用xcpm变频的cpu支持得不好，得到的数值不一定都是你的真实档位。看变频档位，最靠谱的还是in ...

HWsensor显示的数据应该也是OK吧

Chrisenxe 发表于 2016-5-11 14:03

lingdong63585 发表于 2016-5-11 14:19

变频文件今晚需要

tntg534462 发表于 2016-5-11 14:49

合并后没有逅疑？

bizongyi 发表于 2016-5-11 16:10

sblook 发表于 2016-5-11 14:01 https://www.pcbeta.com/static/image/common/back.gif
HWsensor显示的数据应该也是OK吧

引用 toleda 的话：
The existing processor frequency/power state reporting tools (i.e., MSRDumper, HWMonitor) stopped reporting power states between idle and max non turbo. This led to an incorrect conclusion that native Mavericks power management was not working. A new tool, Intel Power Gadget, shows Mavericks power management is working as designed.

Reference：http://www.tonymacx86.com/maveri ... wer-management.html

翻译过来就是：
（对于新的处理器，从论坛数据来看Haswell处理器居多）传统的查看变频工具如 MSRDumper、HWMonitor等工具只会返回最低频率以及非睿频的最高频率。这让很多人以为他们的CPU电源管理没有正常工作。新的工具 —— Intel Power Gadget 以及 Pike R. Alpha 的 AppleIntelCPUPowerManagementInfo.kext(*) 可以来看变频。

这是n大的教程里写的
https://bbs.pcbeta.com/viewthread-1568922-1-1.html
最后他发现，不光 MSRDumper、HWMonitor不准确，连AppleIntelCPUPowerManagementInfo.kext也不行，只有Intel Power Gadget靠谱。

sblook 发表于 2016-5-11 16:52

tntg534462 发表于 2016-5-11 14:49 https://www.pcbeta.com/static/image/common/back.gif
合并后没有逅疑？

什么？后遗症嘛？一天下来没发现

jolianyu 发表于 2016-5-11 17:01

楼主太厉害了，最近在学习黑苹果

sblook 发表于 2016-5-11 17:16

bizongyi 发表于 2016-5-11 16:10 https://www.pcbeta.com/static/image/common/back.gif
引用 toleda 的话：
The existing processor frequency/power state reporting tools (i.e., MSRDumper, ...

老外的细节工作真的是很到位，

IPG显示的应该也是成功变频了吧，故意开了多了app，频率立马飙上去

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ssdt合并到dsdt，cpu变频OK